High-Performance Collision Detection Hardware

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We present a novel hardware architecture for a single-chip collision detection accelerator and algorithms for efficient hierarchical collision. We use a hierarchy of k-DOPs for maximum performance. A new hierarchy traversal algorithm and an optimized triangle-triangle intersection test reduce bandwidth and computational costs. The resulting hardware architecture can process two object hierarchies and identify intersecting triangles autonomously at high speed. Real-time collision detection of complex objects at rates required by force-feedback and physically-based simulations can be achieved even in worst-case configurations.
Graphics hardware, computer animation, virtual reality, hierarchical algorithms, triangle intersection.
BibTeX entry
,  author = "Gabriel Zachmann and G{\"u}nter Knittel"
,  title = "High-Performance Collision Detection Hardware"
,  institution = "University Bonn"
,  number = "CG-2003-3"
,  address = "Informatikk II, Bonn, Germany"
,  month = aug
,  year = 2003
,  url = "http://www.gabrielzachmann.org/"
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Last modified: Sat Sep 10 15:54:24 MDT 2005